(a) Field of the Invention
The present invention relates to a compression bonded 3 type power semiconductor device in which a plurality of electrodes formed in a mesa type structure and a thermal buffer plate are pressed together and, more particularly, to a large-current high-speed switching power semiconductor device such as, for example, a multicathode-structure gate-turn-off thyristor or a multiemitter-structure power transistor.
(b) Description of the Prior Art
A high speed switching high power transistor and gate turn-off thyristor (hereinafter abbreviated to as "a GTO") are, in general, formed in a mesa type structure such that a multiemitter structure or a multicathode structure is made on the cathode side surface of an element by dividing the electrodes of a current pickup side.
A semiconductor device having such a mesa type surface structure tends in general to require a sophisticated manufacturing technique as compared with a planar type semiconductor device and to feasibly cause a defect since the semiconductor device is utilized under severe conditions.
Since the GTO is particularly utilized under severe conditions, compared to a power transistor, and a method for manufacturing the GTO requires a more sophisticated manufacturing technique than the power transistor, the GTO must be improved in the structure of its semiconductor element and in the method for manufacturing the semiconductor device.
FIG. 1 is a vertical sectional view of the essential portion of a power semiconductor device formed by a conventional GTO in which the cathode side structure of its semiconductor element is enlarged. In FIG. 1, the conventional GTO has a P-type emitter layer 1 forming the anode side surface of the GTO, an N-type base layer 2 formed in contact with the emitter layer 1, a P-type base layer 3 and an N-type emitter layer 4. In the GTO, the N-type emitter layer 4 forms the cathodes side surface of the GTO and is projected from the surface of the P-type base layer 3 to form a mesa type. The bottom of the mesa type slot formed in the emitter layer 4 is formed by the P-type base layer 3, and a gate electrode 5 made of aluminum is formed on the surface of the bottom of the groove, i.e., on the surface of the layer 3. Further, the layers emitter 4 are formed at both sides of the groove, and the outer surface of the emitter layer 4 as well as both sides of the groove are covered with insulating films 6. An insulator 7 such as polyimide is filled in the groove, and the electrode 5 is thickly covered with the insulator 7.
A cathode electrode 8 made of aluminum is formed on the emitter layer 4, and contacted on its surface with a thermal buffer plate 10 made of molybdenum Mo. Further, a cathode plate 11 made of copper is disposed on the back surface of the plate 10 in such a manner that the plate 11 constitutes part of an enclosure (not shown).
On the other hand, a thermal buffer plate 12 made of tungsten W is bonded to and alloyed with the surface of the emitter layer 1 (or the anode side surface of the GTO), and an anode plate 13 made of copper forming part of the enclosure is pressed on the other surface of the plate 12.
The conventional power semiconductor device shown in FIG. 1, however, is accompanied with a problem that a short circuit frequently occurs between the gate electrode 5 and the cathode after manufacturing or during use, thereby causing the semiconductor device to be lost in its reliability.
The following fact was observed as a result of the inventors' research for the causes of an insulation breakdown in such a power semiconductor device.
As shown in FIG. 1, the width of a groove formed in the emitter layer 4 is in general approx. 600 microns, while the depth of the groove is extremely shallow such as approximately 20 microns. The thermal buffer plate (having a thickness of approximately 50 microns) 10 superposed through the cathode electrode 8 on the groove is pressed toward the groove by high pressure from the cathode plate 11 made of copper, which is relatively collapsible or deformable. This high pressure compression is necessary to obtain a sufficient heat dissipation and electrical conductivity effects from the plate 10. However, the central portion for covering the groove of the plate 10 is deformed by the high pressure compression and intruded into the groove with the result that the intruded portion is pressed into the insulator 7 in the groove, thereby causing an insulator breakdown. Further, even if the plate 10 is not intruded into the insulator 7 in the groove, an insulator breakdown might arise in a thin portion due to irregular thickness of the coating of the insulator 7. Moreover, the insulator breakdown might also occur owing to the same reason, if the thickness of the gate electrode 5 is irregular. In addition, a projection or burr might be produced on the surface of the thermal buffer plate 10 when manufacturing and handling the plate 10. If this projection exists at the center of the groove, the projection is penetrated into the insulator 7 by the above-described compression, thereby causing a deterioration in the insulator, resulting in a short circuit between the cathode and the gate.